Files
elibc/arch/x86_64/atomic_arch.h
2026-07-07 20:35:07 +03:00

27 lines
600 B
C

#ifndef _ELIBC_ATOMIC_ARCH_H
#define _ELIBC_ATOMIC_ARCH_H
/* x86_64: minimal atomic ops via locked cmpxchg (CPU-local, no syscall) */
static inline int a_cas(volatile int *p, int t, int s)
{
int old;
__asm__ volatile ("lock; cmpxchg %3, %1"
: "=a"(old), "=m"(*p)
: "a"(t), "r"(s), "m"(*p)
: "memory");
return old;
}
static inline void a_inc(volatile int *p)
{
__asm__ volatile ("lock; incl %0" : "=m"(*p) : "m"(*p) : "memory");
}
static inline void a_dec(volatile int *p)
{
__asm__ volatile ("lock; decl %0" : "=m"(*p) : "m"(*p) : "memory");
}
#endif